Combinational circuitry is a type of circuitry in which the current input can only modify the current output. This circuit is also known as the clock independent circuit because for operation is doesn’t need a clock. This circuit doesn’t have a memory element or any feedback path, so the circuit can’t store any data. A combinational circuit can design by combining the logic gates. The circuitry used in combinational logic is used as coding, decoding, error detection, manipulation, etc. The basic circuits of combinational logic are multiplexer, decoder, encoder, shitter, Adder, Subtractor, etc.
Fig. Block diagram of a combinational circuitry.
A combinational logic circuit can have ‘n’ number of input variables and ‘m’ number of the output variable. For the ‘n’ input variable, there is 2 n possible combinations of input variables. For each unique combination of input variables, there is only one possible output combination. The output function is always expressed in terms of the input variables. A truth table or Boolean equation can determine the relationship between the output and input of a combinational circuit.
The classification of the combinational circuitry is based on the application they being used:
Combinational logic gates are the fundamental gate which is combined to form any circuitry in the digital electronic. A logic gate is ideal for implementing an essential Boolean function—for example, gate, NAND gate, OR gate, NOR gate, etc.
AND gate has two or more input with one output. The output is high means ‘1’ when all the input is high; otherwise, the outcome is low means ‘0’.
Fig. Logic diagram of AND gate
OR gate has two or more input and one output. The output is high means ‘1’ when at least one input is high; otherwise, the result is low, which means ‘0’. But in commercial OR gate with 2,3 and $ input types is available.
Fig. Logic diagram of OR gate
NOT gate has one input with one output. When the input is high means ‘1’, then the NOT gate’s output will be low, which means ‘0’.
Fig. Logic diagram of NOT gate
NAND gate means NOT AND, here AND gate output feeds into NOT gate. NAND gate can be designed from the AND gate truth table by complementing the output variables. The result of the NAND gate is low when all the logic input ishigh. Otherwise, the output is high.
Fig. Logic diagram of NAND gate
NOR means NOT OR gate. Here OR gate output is feed into NOT gate. NOR gate designed from the OR gate truth table by complimenting all the output variables. The output of a NOR gate is high when all inputs are low. Otherwise, the output is low.
Fig. Logic diagram of NOR gate
XOR gate means Exclusive-OR gate, also known as EX-OR gate, it has two input and one output. For two input gates, the output of the XOR gate is high, which means ‘1’ when the input bit is unlike, and output is low means ‘0’ when there is like input.
Fig. Logic diagram of XOR gate
XNOR means Exclusive-NOR gate, also known as EX-NOR; it is NOT of EX-OR. The output of a two-input XNOR gate is high, which means ‘1’ when the input is like and Low when, unlike input.
Fig. Logic diagram of XNOR gate
Half adder is an example of combinational circuitry, in which we can add two bits. It has two input, each of one bit and two output, in which one is carry output, and the other is for sum output.
Fig. Logic diagram of half adder designed with AND gate and XOR gate.
Full adder is an example of the arithmetic combinational circuit; here, we can add their bit at a time, and has two output sum and carry. In half adder, we could only add two bits at a time. A full adder overcomes that limitation; a full adder is essential for adding a huge binary number. However, one full adder can add an only one-bit binary number at a time, but by cascading the full adder, we can add a more extensive binary number. However, we can create a full adder by combining two half adders.
Fig. Block diagram of full adder
A half subtractor is an arithmetic combinational circuit that performs subtraction of two input bit and provides two outputs, one as a difference and the other as borrow. Designing the subtractor circuit is mainly similar to that of an adder. I cannot consider any borrow input.
Fig. Logical diagram of half subtractor designed with AND gate, NOT gate and XOR gate.
Full subtractor is also an arithmetic combinational circuitry, where we can perform subtraction of three one-bit inputs, inputs are the minuend, subtrahend, and a borrow. It generates two outputs, one as the difference of the input and the other as borrow.
Fig. Block diagram of full subtractor.
The multiplexer has multiple inputs and a single output, and it has a selector line that selects one input at a time as the requirement. It sends it to the output line, and for the ‘n’ number of input here, we need the ‘m’ number of the select line where n = 2 m . It also has an enabled input line, enabling us to cascade multiplexer or further expansion as required. It is also called a data selector. 16: 1 Is the largest multiplexer available in IC form.
Fig. Block diagram of Multiplexer.
Demultiplexer has only one input and multiple outputs. It has a selector line that selects one output line at a time; with the select line, we can distribute the input signal into many output lines as our requirement. For the ‘n’ number of output line here, we need the ‘m’ number of the select line where n = 2 m . Demultiplexer can work as a binary to decimal converter.
Fig. Block diagram of Demultiplexer.
A comparator is a combinational circuit where it can compare the magnitude of a two n-bit number and provide us with the relative result as output. It can have three outputs. For example, the input we provide A and B to the comparator where A and B can be an n-bit number the output of the comparator can be AB. The circuit checks the magnitude of the input and compares it; there is a different output port for A=B, A>B, and A
Fig. block diagram of n-bit comparator
The encoder is a combinational circuit. It has 2 n input lines and has ‘n’ output lines corresponding to the n-bit code input.
Fig. Block diagram of Encoder.
It is a circuit that converts binary n input lines to a maximum 2 n output lines.
Fig. Block diagram of a decoder.
A BCD adder is an arithmetic combinational circuit used to operate addition on BCD numbers, digits and produced output in BCD form. Sometimes the output of a BCD adder may be a valid BCD number, and then it converts that invalid BCD number into valid by adding 0110 to the invalid output.
See also Do All Zener Diodes Have the Same Temperature Coefficients? Unveiling the TruthA BCD subtractor is to operate the subtraction on the BCD number. If we take two input BCD number, one as A and the other as B, subtraction of the BCD number is equivalent to the addition of a compliment of B to A. In BCD, subtraction 9’s complement or 10’s complement method is used.
The circuitry of the Arithmetic logical unit is widely used as a combinational circuitry, and This circuitry is used to perform all the arithmetic and logical operation for and processor. ALU is known as the heart of a microprocessor or microcontroller.
MSI stands for “Medium-scale integration”, it can contain 30 to 1000 electronic components in a single chip of IC. LSI stands for “Large scale integration”, It can have thousands of embedded components and integrated on a single IC.
| A | B | C | S | C |
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |
Equation for sum:
Carry:
Fig. Implementation of Full-Adder in MSI or LSI circuitry.
Designing a combinational logic circuit can be done with gates, whereas gates are practically available as IC. For different gates, there are other IC available with different IC numbers.
See also Comprehensive Guide: How Diodes are Rated in Terms of Current and VoltageThe functions of a combinational logic can be defined with Truth Table, Logic Diagram or Boolean Equation.
Truth Table: Truth table is a tabular list of all possible binary combinations of the input variable and related output combination of a logic circuit. There are only two possibilities of an input or output bit, i. e. ‘0’ and ‘1’. If the number of input is ‘n’, there will be 2 n combinations. In this table, there is one row for representing input combinations as well as different rows for output combinations. This can be obtained from the logic diagram or Boolean expression of the circuitry.
Logic Diagram: The logic diagram is mainly composed of a basic logic gate and some symbolic representation of the circuit. It shows us the interconnection of logic gates, represents some signal lines (like enable, select line, control lines, etc.). It is used to define the functionality of circuitry. It can be obtained through Boolean expression or the truth table of the circuitry.
Boolean Expression: This is an equation formed from the combination of input and output variable; here, the expression is mainly used to define the input variable’s output variable. This expression can be derived from the truth table or the logic diagram of the circuitry.
In real life, we can see the combinational circuit in calculator, RAM (Random Access Memory), Communication system, Arithmetic and logic unit in CPU (central processing Unit), Data communication, wi-fi, cell phone, Computer, etc. These are a real-life example of where the combinational circuit is used.
Combinational circuit analysis is the analysis of a given logic circuit or a circuit diagram; from here, we can gather information regarding the circuit. An analysis is to verify the behaviours of the circuitry with its specifications; analysis of a circuit can be used to reduce the number of gates, optimise, reduce delay, or convert the circuit into another required form.
The combinational loop is a loop in which the output of a combinational logic(which can consist of one or more combinational logic gates) is feedback to the same logic without any memory element in the feedback path.
Fig. Combinational loop type latch
Here combinational loop implemented, which is equivalent to latch.
Static CMOS is widely used for circuitry because it has good performance, low power consumption. A CMOS gate is a combination of a pull-up network (PUN) and Pull-down network (PDN); an input is distributed to both pull-up and pull-down circuits.
The function of the pull-up network is to connect the output with the voltage source when the output needs to be ‘1’. Whereas a pull-down network provides the connection between the ground to the output when the output is meant to be ‘0’. Pull-down network is designed with NMOS, and PMOS is used in PUN. NMOS is connected in series to form AND function, whereas when connected in parallel from OR function. Where PMOS in parallel form output as NAND function and series form NOR function.
Fig. CMOS diagram of half adder.
CMOS is a complementary network. This means for parallel connection in pull-up network there is the series connection in pull-down network. The complementary gate is generally inverting. With one stage, it can perform a function such as NAND, NOR, and XNOR, and for non-inverting Boolean function such as AND, OR and XOR, it required an extra inverter stage. The number of transistors for implementation of n- input logic gate is 2n.
MUX i.e., Multiplexer is a combinational logic design, it has only one output and can have multiple input. It has ‘n’ select line for2 n input, selector line s use to select which input line will be connected to the output line.
Fig. Block diagram of a 4:1 multiplexor
| S1 | S2 | Y |
| 0 | 0 | I0 |
| 0 | 1 | I1 |
| 1 | 0 | I2 |
| 1 | 1 | I3 |
A simple combinational look is a circuit designed with XOR and NOR gate, where XOR gate is a bit comparator, and NOR gate is used as a controlled inverter. We can use XOR to check and compare the input and the key code bit by bit; if the input completely matches with the key code, the lock will be unlocked. When the inputs and not the same XOR provide ‘1’ as an output, now the output will go through the NOR gate. In this way, we can design a simple lock using gates.
See also Wet Adiabatic Lapse Rate: Detailed Insight And FactsCombinational logic circuits are the basic circuit in digital electronic even sequential circuit is designed from the combinational circuit with the memory element.
These circuits are used for designing the ROM of a computer or a microprocessor. ROM (Read Only Memory) is designed with Encoder, Decoder, Multiplexer, Adder Circuitry, Subtractor Circuitry, etc., which are all combinational circuits.
Whereas ALU (arithmetic and logic unit) in the processor, which is also from the combinational circuit, mainly consists of Adder, Subtractor, etc., to perform every arithmetic operation.
Encoder and decoder are used to convert one form of data to another (like from Binary to Decimal); these are commonly used in communication for transferring data from one end to another. This circuit provides synchronization if needed; with the help of these, we can perform any operation with greater accuracy.
A multiplexer is used to transfer data in a single line. This circuit is used in broadcasting, telegraphy, etc.
The limitation or disadvantage of half-adder is overcome by a full adder, whereas the full subtractor overcomes the restriction of half subtractor.
Disadvantages of Multiplexer: Limitation of using the port, which can use in a specific sequence. The circuitry can cause delay.
The disadvantage of Demultiplexer: wastage of bandwidth, delay can from due to synchronization.
Disadvantages of Encoder: Complex circuitry can be easily subjected to magnetic interference.
Overall, the combinational circuit is complex as the circuit is getting bigger; in bigger circuitry, there can be high propagation delay, it doesn’t have any memory element.
A 1 to 4 Demultiplexer has two select line, four output and one input. The input data connected to the output line according to the select line.
Fig. Block diagram of 1:4 Demultiplexer
| INPUTS | OUTPUTS | ||||
| S1 | S0 | Y3 | Y2 | Y1 | Y0 |
| 0 | 0 | 0 | 0 | 0 | 1 |
| 0 | 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 0 | 1 | 0 | 0 |
| 1 | 1 | 1 | 0 | 0 | 0 |
Yes, there can be a metastability state for some time in pure combinational logic.
Metastability refers to the state which cannot be defined as ‘0’ or ‘1’. Usually, this happens to a circuit when the voltage is stuck between ‘0’ and ‘1’, which can cause oscillation, uncertain output, unclear transition, etc. When such a signal goes through the combinational circuit, it can violate basic gates’ specification and spread through the overall circuit.
For example, when taking the given circuit, as we see here, there is an AND gate and a NOT gate, practically a circuit has some propagation delay; as AND gate has some propagation delay, the NOT gate has to. As we know, the output should be defined at all times, but there is a time interval T where the output state or the transition state is not definite or undesirable. That state at that time interval can be considered as metastability of a pure combinational logic circuit.
For designing circuitry, you must know the basic of VHDL, such as representing a Boolean function, representing a fundamental gate, etc.
Here we considering full-adder as an example:
Entity FullAdder is
Port (A, B, C: in bit;
